Qué (quién) es error correcting memory - definición
COMPUTER MEMORY WHICH DETECTS AND CORRECTS ERRORS
ECC RAM; ECC Memory; Error-correcting code memory; Error correcting code memory; Error-correcting RAM
![In 1982 this 512KB memory board from [[Cromemco]] used 22 bits of storage per 16 bit word to allow for single-bit error correction](https://commons.wikimedia.org/wiki/Special:FilePath/Cromemco 512MSU error correcting S-100 memory storage unit.jpg?width=200 "In 1982 this 512KB memory board from [[Cromemco]] used 22 bits of storage per 16 bit word to allow for single-bit error correction")
![Two 8 GB [[DDR4]]-2133 ECC 1.2 V [[RDIMM]]s](https://commons.wikimedia.org/wiki/Special:FilePath/Two 8 GB DDR4-2133 ECC 1.2 V RDIMMs.jpg?width=200 "Two 8 GB [[DDR4]]-2133 ECC 1.2 V [[RDIMM]]s")
error correcting memory
<storage> (ECM) RAM using some kind of {error detection and
correction} (EDAC) scheme. The two types of memory errors in
RAM (especially DRAM) are "soft" errors due to
radiation-induced bit switching, and "hard" errors due to the
unexpected deterioration of a memory chip. Soft errors do not
indicate lasting damage to the memory board, but they do
corrupt programs or data. Hard errors demand physical
repairs. Single bit memory failures are the most common. A
hard single bit failure, such as that caused by a completely
dead chip can be corrected by EDAC if each chip supplies only
one bit of each word. EDAC memory is the most common level of
protection for minicomputers and mainframes whereas the
cheaper parity protection is more common in microcomputers.
[Clearpoint, "The Designer's Guide to Add-In Memory", Third
Addition ].
(1995-10-10)
ECC memory
Error correction code memory (ECC memory) is a type of computer data storage that uses an error correction code (ECC) to detect and correct n-bit data corruption which occurs in memory. ECC memory is used in most computers where data corruption cannot be tolerated, like industrial control applications, critical databases, and infrastructural memory caches.
Forward Error Correction
![A block code (specifically a [[Hamming code]]) where redundant bits are added as a block to the end of the initial message](https://commons.wikimedia.org/wiki/Special:FilePath/Block code error correction.png?width=200 "A block code (specifically a [[Hamming code]]) where redundant bits are added as a block to the end of the initial message")
![A continuous code [[convolutional code]] where redundant bits are added continuously into the structure of the code word](https://commons.wikimedia.org/wiki/Special:FilePath/Convolutional code error correction.png?width=200 "A continuous code [[convolutional code]] where redundant bits are added continuously into the structure of the code word")
SCHEME FOR CONTROLLING ERRORS IN DATA OVER NOISY COMMUNICATION CHANNELS
Error-correcting code; Forward error correction; Error correcting code; Error correcting codes; Channel coding; Forward Error Correction; Error Correcting Code; Interleaver; Error correction codes; Channel Coding; Error-correcting codes; Bit-interleaving; Forward error correction code; Forward error correction codes; Error correction coding; Error correcting coding; Error-correcting coding; Bit interleaving; Error-correction code; Error-correction coding; FEC code; Forward error recovery; List of error-correcting codes
<algorithm> (FEC) A class of methods for controling errors in
a one-way communication system. FEC sends extra information
along with the data, which can be used by the receiver to
check and correct the data.
A CPU writing data to RAM is a kind of one-way
communication - see error correcting memory and {error
checking and correction}.
(1996-10-02)
Wikipedia
ECC memory
Error correction code memory (ECC memory) is a type of computer data storage that uses an error correction code (ECC) to detect and correct n-bit data corruption which occurs in memory. ECC memory is used in most computers where data corruption cannot be tolerated, like industrial control applications, critical databases, and infrastructural memory caches.
Typically, ECC memory maintains a memory system immune to single-bit errors: the data that is read from each word is always the same as the data that had been written to it, even if one of the bits actually stored has been flipped to the wrong state. Most non-ECC memory cannot detect errors, although some non-ECC memory with parity support allows detection but not correction.
